Updated: 24-Jan-01
Second of two possible options to build the receiving and filtering circuit

It is recommended to download first the PDF Document DDDAC1.pdf with the schematics.
For pictures of all the parts please see the Technical Backgrounds Section and Picture Galery

dacpcbs.jpg (8446 bytes)
The PCB with the Receiver, Digital Filter and DAC Stage. Clearly to see are the switches for making combinations.

In the DDDAC1.PDF document I describe 2 digital filter sections. Of course, thanks to the switches, any combination can be made here, but to keep it simple I describe 2 "combinations" from which this is the second part:

Receiving Part:

Clearly painted are the two optical TOS-LINK receivers (347kB download)and the coax cinch input with pulse transformer. This data is AC coupled linked to the input of the receiver CS8420 (1413kB download). The 8420 is a newly developed very versatile receiver and UPSAMPLER (!!!) It will work in both software as hardware mode. Of course the chip is working here in hardware mode. Even in hardware mode there are 6 different modes, where 2 are most interesting, the standard mode where the clock signal is being re generated with a phase locked loop (PLL) and the asynchrone one where an external clock is applied. This clock can have almost any frequency as long as it stays within the range of the 8420 (max sampling 8kHz - 108kHz) and the digital filter behind. The Burr Brown can take up to 96kHz, the NPC to 55kHz. This ensures an complete jitterfree clock for the digital filter and DAC chip, thus giving maximum spatial sound reproduction. The new clock simply samples again the data (digitally of course) and generates 24 bit output at the new sample speed. Please read the Listening Section on this Frame for some interesting results with the clock generator being used  (XO Clock versus standard oscillator). Please note the reset switch. Normally you don't need it, but in case of any data interruption and corruption, noticeable as sharp load noise, this switch will bring the 8420 in its initial condition, controlled by the resistors connected to plus and ground.

The chip now further decrypt the 16 bit CD code into the 4 basic audio signals which are industry standard:

Please note that this upsampler delivers now 24 bit newly sampled data at a fully new Fs speed !!

Data This is left and right data in Left/Right sequence, where each "word" uses 32 bits length, even though the data is 24 bit long. This is done to keep the standard open for 20, 24 bits and ......  The Data is in RIGHT JUSTIFIED MSB first. There are more modes in the digital data world, but this one is the most commonly used for Audio equipment.
Fs Fs is the actual sample frequency, In this case any thing between 32 and 96 kHz (!!!)
Bitclock The bit clock, clocks the bits into the digital filter at a rate of 64 x Fs (2 words of 32 bits)
System clock The final system clock runs at 256 x Fs, enabling the Digital filter to output 32 bit words Left and Right in parallel at 8 times oversampling (32 bits word x 8 times oversampling needs 256 Fs), Page 3 of the DDDAC1.PDF describes this overview as well.






and are fed into the .........

The Digital Filter

The digital filter is doing many things with the original signal, like calculating interpolating "new" samples. The oversampling runs at 8 times, Therefore the Filtering of the sample frequency components after the DAC later on can be much simpler. In stead of a BRICKWALL filter you can use simple 6dB linear filters. The digital filter also filters in the digital domain already all frequencies above the audioband as with the interpolation all kinds of "new" frequency products see the light. It may be clear that the quality of the filtering algorithms and speed of the digital filter is critical for the final result. The Burr Brown chip DF1704 is one of the newly developed filters ready for 24 bit and 96kHz sampling rate. It is priced actually quite good. For those wanting more details, have a look at the datasheet of the DF1704.... (223kB download). The DF1704 need to be set up for the right number of bits at the input (16 or 24 bits) and output bits (20 for the PCM63). This is done with the switchbank. Of course you can choose fix connections to V+ or GND Furthermore there is an option to do the digital filtering above 22kHz with a sharp or slow roll of filter. To be honest, I could not really tell the difference when listening to it.... But may be you can.

Please read the Listening Section on this Frame for some the results of the listening test DF1704 versus SM5842..........

The digital filter outputs its newly generated data with the industry standard 4 signals:

DOL Data Output Left This is left channel data where each "word" uses 32 bits length with 20 information. The Data is in RIGHT JUSTIFIED MSB first.
DOR Data Output Right This is right channel data where each "word" uses 32 bits length with 20 information. The Data is in RIGHT JUSTIFIED MSB first.
WCK Word Clock
Latch Enable
The word clock, starts the conversion after all bits have been clocked in serially. This speed is 8 x Fs (depending on the clock speed you choose for the up sampler)
BCK Bit Clock
System Clock
The final system clock runs at 256 x Fs, controlling the serial clocking into the DAC of the 2 channels in parallel (!).







These 4 signals goes to the final DAC chip stage for the Digital to analog conversion. Basically you see that the whole setup of a DAC is more of less modular with standard interfacing signals. This makes experimenting and upgrading much easier.



IMPORTANT: The information provided on this page is intended as guide for DIY activities and therefore free to copy and or publish. If any one wishes to use any of the information from my WEB site, please make sure to refer and footnote to my URL Link as source! Doede Douma